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*rohs directive 2002/95/ec jan 27 2003 including annex january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp3xxxh3sl overvoltage protector series tisp3070h3sl thru tisp3115h3sl, tisp3125h3sl thru tisp3210h3sl, tisp3250h3sl thru TISP3350H3sl dual bidirectional thyristor overvoltage protectors tisp3xxxh3sl overview this tisp ? device series protects central office, access and customer premise equipment against overvoltages on the telecom line. the tisp3xxxh3sl protects r-g and t-g. in addition, the device is rated for simultaneous r-g and t-g impulse conditions. the tisp3xxxh3sl is available in a wide range of voltages and has a high current capability, allowing minimal series resistance to be used. these protectors have been specified mindful of the following standards and recommendations: gr-1089-core, fcc part 68, ul1950, en 60950, iec 60950, itu-t k.20, k.21 and k.45. the TISP3350H3sl meets the fcc part 68 ?b? ringer voltage requirement and sur- vives both type a and b impulse tests. these devices are housed in a through-hole 3-pin single-in-line (sl) plastic package. summary electrical characteristics summary current ratings part # v drm v v (bo) v v t @ i t v i drm a i (bo) ma i t a i h ma c o @ -2 v pf functionally replaces tisp3070h3 58 70 3 5 600 5 150 140 p1402ac? tisp3080h3 65 80 3 5 600 5 150 140 p1602ac? tisp3095h3 75 95 3 5 600 5 150 140 tisp3115h3 90 115 3 5 600 5 150 74 p2202ac? tisp3125h3 100 125 3 5 600 5 150 74 tisp3135h3 110 135 3 5 600 5 150 74 tisp3145h3 120 145 3 5 600 5 150 74 p2702ac? tisp3180h3 145 180 3 5 600 5 150 74 p3002ac tisp3210h3 160 210 3 5 600 5 150 74 p3602ac? tisp3250h3 190 250 3 5 600 5 150 62 p4202ac tisp3290h3 220 290 3 5 600 5 150 62 p4802ac? TISP3350H3 275 350 3 5 600 5 150 62 p6002ac ? bourns part has an improved protection voltage parameter i tsp a i tsm a di/dt a/ s waveshape 2/10 1.2/50, 8/20 10/160 5/320 10/560 10/1000 1 cycle 60 hz 2/10 wavefront value 500 300 250 200 130 100 60 400 *rohs compliant versions available
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. itu-t k.20/21 rating . . . . . . . . 8 kv 10/700, 200 a 5/310 ion-implanted breakdown region precise and stable voltage low voltage overshoot under surge 1 2 3 t g r mdx xaga how to order description device symbol sl package (top view) tisp3xxxh3sl overvoltage protector series rated for international surge wave shapes - single and simultaneous impulses the tisp3xxxh3sl limits overvoltages between the telephone line ring and tip conductors and ground. overvoltages are normally c aused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. the protector consists of two symmetrical voltage-triggered bidirectional thyristors. overvoltages are initially clipped by bre akdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. this low-voltag e on state causes the current resulting from the overvoltage to be safely diverted through the device. the high crowbar holding current prevents d.c. latchup as the diverted current subsides. this tisp3xxxh3sl range consists of twelve voltage variants to meet various maximum system voltage levels (58 v to 275 v). they are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. these high current prot ection devices are in a 3-pin single-in-line (sl) plastic package and are supplied in tube pack. for alternative impulse rating, voltage and holding current values in sl packaged protectors, consult the factory. for lower rated impulse currents in the sl package, the 35 a 10/1000 tisp3xxxf3sl series is available. these monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation. 3-pin through-hole packaging - compatible with to-220ab pin-out - low height ................................................................... 8.3mm low differential capacitance ...................................... < 67 pf .............................................. ul recognized component g tr sd3xaa terminals t, r an d g correspond to the alternative line designators of a, b and c waveshap esta ndard i tsp a 2/10 s gr-1089-core 500 8/20 si ec 61000-4-5 300 10/160 sf cc part 68 250 10/700 s f cc part 68 it u-t k.20/21 200 10/560 sf cc part 68 160 10/1000 s gr-1089-core 100 device package carrier tisp3xxxh3 sl (single-in-line) tube tisp3xxxh3sl tisp3xxxh3sl-s insert xxx value corresponding to protection voltages of 070, 080, 095, 115 etc. for standard te rmination finish order as for lead free te rmination finish order as device v drm v v (bo) v ?070 58 70 ?080 65 80 ?095 75 95 ?115 90 115 ?125 100 125 ?135 110 135 ?145 120 145 ?180 145 180 ?210 160 210 ?250 190 250 ?290 220 290 ?350 275 350
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. rating sy m bol value unit re petitive peak off-state voltage, (see note 1) 3070 3080 3095 3115 3125 3135 3145 3180 3210 3250 3290 3350 v drm 58 65 75 90 100 110 120 145 160 190 220 275 v non-repetitive peak on-state pulse current (see notes 2, 3 and 4) i tsp a 2/10 s( gr -1089-core, 2/10 s voltage wave shape) 500 8/20 s( ie c 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator) 300 10/160 s(f cc part 68, 10/160 s voltage wave shape) 250 5/200 s( vde 0433, 10/700 s voltage wave shape) 220 0.2/310 s (i3124, 0.5/700 s voltage wave shape) 200 5/310 s(i tu-t k.20/21, 10/700 s voltage wave shape) 200 5/310 s(f tz r12, 10/700 s voltage wave shape) 200 5/320 s(f cc part 68, 9/720 s voltage wave shape) 200 10/560 s(f cc part 68, 10/560 s voltage wave shape) 160 10/1000 s( gr -1089-core, 10/1000 s voltage wave shape) 100 non-repetitive peak on-state current (see notes 2, 3 and 5) i tsm 55 60 1 a 20 ms (50 hz) full sine wave 16.7 ms (60 hz) full sine wave 1000 s 50 hz/60 hz a.c. initial rate of rise of on-state current, exponential current ramp, maximum ramp value < 200 a di t /dt 400 a/ s j unction temperature t j -40 to +150 c storag e temperature range t stg -65 to +150 c notes: 1. see figure 9 for voltage values at lower temperatures. 2. in itially the tisp3xxxh3sl must be in thermal equilibrium. 3. these non-repetitive rated currents are peak values of either polarity. the rated current values may be applied to the r or t terminals. additionally, both r and t terminals may have their rated current values applied simultaneously (in this case the g terminal return current will be the sum of the currents applied to the r and t terminals). the surge may be repeated after the ti sp 3x xxh3sl returns to its initial conditions. 4. see figure 10 for impulse current ratings at other temperatures. above 85 c, derate linearly to zero at 150 c lead temper ature. 5. eia/jesd51-2 environment and eia/jesd51-3 pcb with standard footprint dimensions connected with 5 a rated printed wiring track widths. see figure 8 for the current ratings at other durations. figure 8 shows the r and t terminal current rating for si multaneous operation. in this condition, the g terminal current will be 2xi tsm(t) , t he sum of the r and t terminal currents. derate current values at -0.61 %/ c fo r ambient temperatures above 25 c. absolute maximum ratings, t a = 25 c (unless otherwise noted) tisp3xxxh3sl overvoltage protector series
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. electrical characteristics for the r and g or t and g terminals, t a = 25 c (unless otherwise noted) tisp3xxxh3sl overvoltage protector series parameter test conditions min typ max unit i drm repetitive peak off- st ate current v d = v drm t a = 25 c t a = 85 c 5 10 a v (bo) breakove r voltage dv/dt = 750 v/ms, r sour ce = 300 ? 3070 3080 3095 3115 3125 3135 3145 3180 3210 3250 3290 3350 70 80 95 115 125 135 145 180 210 250 290 350 v v (bo) impuls e breakover voltage dv/dt 1000 v/ s, linear voltage ramp, maximum ramp value = 500 v di/dt = 20 a/ s, linear current ramp, maximum ramp value = 10 a 3070 3080 3095 3115 3125 3135 3145 3180 3210 3250 3290 3350 78 88 103 124 134 144 154 189 220 261 302 362 v i (bo) breakover current dv/dt = 750 v/ms, r sour ce = 300 ? 0.15 0.6 a v t on-state voltage i t = 5a, t w = 100 s 3v i h hold ing current i t = 5a, di/dt=-/+30ma/ms 0.15 0.6 a dv/dt critical rate of rise of off-state voltage linear voltage ramp, maximum ramp value < 0.85v drm 5kv/ s i d off-state current v d = 50 v t a = 85 c 10 a c off off-state capacitance f= 100 khz, v d =1v rms, v d =0, f= 100 khz, v d =1v rms, v d =-1v f= 100 khz, v d =1v rms, v d =-2v f= 100 khz, v d =1v rms, v d =-50v f= 100 khz, v d =1v rms, v d =- 100 v (see note 6) 3070 thru 3115 3125 thru 3210 3250 thru 3350 3070 thru 3115 3125 thru 3210 3250 thru 3350 3070 thru 3115 3125 thru 3210 3250 thru 3350 3070 thru 3115 3125 thru 3210 3250 thru 3350 3125 thru 3210 3250 thru 3350 170 90 84 150 79 67 140 74 62 73 35 28 33 26 pf note 6: to avoid possible voltage clipping, the 3125 is tested with v d =-98v.
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. electrical characteristics for the r and t terminals, t a = 25 c (unless otherwise noted) thermal characteristics tisp3xxxh3sl overvoltage protector series parameter test conditions min typ max unit i drm repetitive peak off- st ate current v d = 2v drm 5 a v (bo) breakove r voltage dv/dt = 750 v/ms, r source = 300 ? 3070 3080 3095 3115 3125 3135 3145 3180 3210 3250 3290 3350 140 160 190 230 250 270 290 360 420 500 580 700 v v (bo) impuls e breakover voltage dv/dt 1000 v/ s, linear voltage ramp, maximum ramp value = 500 v di/dt = 20 a/ s, linear current ramp, maximum ramp value = 10 a 3070 3080 3095 3115 3125 3135 3145 3180 3210 3250 3290 3350 156 176 206 248 268 288 308 378 440 522 604 724 v parameter t est conditions min typ max unit r ja j unction to free air thermal resistance eia/jesd51-3 pcb, i t = i tsm(10 00) , t a = 25 c, (see note 7) 50 c/w note 7: eia/jesd51-2 environment and pcb has standard footprint dimensions connected with 5 a rated printed wiring track widths.
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. parameter measurement information tisp3xxxh3sl overvoltage protector series fi gure 1. voltage- current characteristic for terminal pairs -v v drm i drm v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i switching characte ristic +v +i v (bo) i (bo) v d i d i h i t v t i tsm i tsp -i quadrant iii switching characte ristic pm4xaac v drm i drm v d = 50 v a nd i d = 10 a used for reliability release
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. t ypical characteristics tisp3xxxh3sl overvoltage protector series . figure 2. figure 3. figure 4. figure 5. t j - junction temperature - c -25 0 25 50 75 100 125 150 |i d | - off-state current - a 0001 001 01 1 10 100 t chag v d = 50 v t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakover voltage 0.95 1.00 1.05 1.10 tc4haf v t - on-state voltage - v 0.7 1.5 2 3 4 5 7 110 i t - on-state current - a 1.5 2 3 4 5 7 15 20 30 40 50 70 150 200 1 10 100 t a = 25 c t w = 100 s ' 3250 thru ' 3350 ' 3125 thru ' 3210 ' 3070 thru ' 3115 tc7aj t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized holding current 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 1.0 tc4had off-state current vs junction temperature on-state current vs on-state voltage normalized breakover voltage vs junction temperature normalized holding curent vs junction temperature
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. t ypical characteristics tisp3xxxh3sl overvoltage protector series figure 6. figure 7. v d - of f-state voltage - v 0.5 1 2 3 5 10 20 30 50 100 150 capacitance normalized to v d = 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 t j = 25 c v d = 1 vrms ' 3125 thru '3210 ' 3250 thru '3350 ' 3070 thru '3115 tc7hak v drm - re petitive peak off-state voltage - v 50 60 70 80 90 150 200 250 300 100 c - differential off-state capacitance - pf 30 35 40 45 50 55 60 65 70 75 d c = c off (-2 v) - c off(-50 v) '3070 '3080 '3095 ' 3125 ' 3135 ' 3145 ' 3180 '3250 '3290 '3350 ' 3210 '3115 tc7xan normalized capacitance vs off-state voltage differential off-state capacitance vs rated repetitive peak off-state voltage
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. t ypical characteristics tisp3xxxh3sl overvoltage protector series . figure 8. figure 9. figure 10. t - current duration - s 01 1 10 100 1000 i tsm(t) - n on-repetitive peak on-state current - a 1.5 2 3 4 5 6 7 8 9 15 20 1 10 ti4haca v gen = 600 v rms, 50/60 hz r gen = 1.4*v gen /i tsm(t) eia/jesd 51-2 environment eia/jesd 51-3 pcb, t a = 25 c simultaneous operation of r and t terminals. g te rminal current = 2xi tsm (t) t amin - mi nimum ambient temperature - c -35 -25 -1 5-5 5 15 25 -40 -30 -20 -10 0 10 20 derating factor 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 '32 50 thru '3350 '31 25 thru '3210 '30 70 thru '3115 tc7ham t a - ambient temperature - c -40 -30 -20 -10 0 10 2 0304050607080 impulse current - a 90 100 120 150 200 250 300 400 500 600 700 iec 1. 2/50, 8/20 itu-t 10/700 fcc 10/560 bellcore 2/10 bellcore 10/1000 fcc 10/160 tc4haa non-repetitive peak on-state current vs current duration impulse rating vs ambient temperature v drm derating factor vs minimum ambiient temperature
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. standard peak voltage setting v volt age waveform s peak current value a current waveform s tisp3xxxh3 25 c rating a series resistance ? gr -1089-core 2500 2/10 500 2/10 500 0 1000 10/1000 100 10/1000 100 fcc part 68 (march 1998) 1500 10/160 200 10/160 250 0 800 10/560 100 10/560 160 0 1500 9/720 ? 37.5 5/320 ? 200 0 1000 9/720 ? 25 5/320 ? 200 0 i3124 1500 0.5/700 37.5 0.2/310 200 0 itu-t k.20/k.21 1500 4000 10/700 37.5 100 5/310 200 0 ? fcc part 68 terminology for the waveforms produced by the itu-t recommendation k.21 10/700 impulse generator impulse testing tisp3xxxh3sl overvoltage protector series a pplications information ac power testing capacitance normal system voltage levels to verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various imp ulse wave forms. the table below shows some common values. if the impulse generator current exceeds the protectors current rating, then a series resistance can be used to reduce the cur r ent to the protectors rated value to prevent possible failure. the required value of series resistance for a given waveform is given by t he following calculations. first, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the prote ctors rated current. the impulse generators fictitious impedance (generators peak voltage divided by peak short circuit current) is then subtracted from the minimum total circuit impedance to give the required value of series resistance. in some cases, the equipment will require verification over a temperature range. by using the rated waveform values from figure 10, the appropriate series resistor value can be calculated for ambient temperatures in the range of -40 c to 85 c. the protector can withstand the g return currents applied for times not exceeding those shown in figure 8. currents that exceed these times must be terminated or reduced to avoid protector failure. fuses, ptc (positive temperature coefficient) resistors and fusible r esistors are overcurrent protection devices which can be used to reduce the current flow. protective fuses may range from a few hundred mill iamperes to one ampere. in some cases, it may be necessary to add some extra series resistance to prevent the fuse opening during impulse t esting. the current versus time characteristic of the overcurrent protector must be below the line shown in figure 8. in some cases, there may be a further time limit imposed by the test standard (e.g. ul 1459 wiring simulator failure). the protector characteristic off-state capacitance values are given for d.c. bias voltage, v d , values of 0, -1 v, -2 v, and -50 v. where possible, values are also given for -100 v. values for other voltages may be calculated by multiplying the v d = 0 capacitance value by the factor given in figure 6. up to 10 mhz, the capacitance is essentially independent of frequency. above 10 mhz, the effective capacitance is str ongly dependent on connection inductance. in many applications, the typical conductor bias voltages will be about -2 v and -50 v. fig ure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 v and the other at -50 v. the protector should not clip or limit the voltages that occur in normal system operation. for unusual conditions, such as ring ing without the line connected, some degree of clipping is permissible. under this condition, about 10 v of clipping is normally possible witho ut activating the ring trip circuit. figure 9 allows the calculation of the protector v drm value at temperatures below 25 c. the calculated value should not be less than the maximum normal system voltages. the tisp3290h3, with a v drm of 220 v, can be used for the protection of ring generators producing 105 v rms of ring on a battery voltage of -58 v. the peak ring voltage will be 58 + 1.414*105 = 206.5 v. however, thi s is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage.
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. normal system voltage levels (continued) tisp3xxxh3sl overvoltage protector series a pplications information for the extreme case of an unconnected line, the temperature at which clipping begins can be calculated using the data from fig ure 9. to possibly clip, the v drm value has to be 206.5 v. this is a reduction of the 220 v 25 c v drm value by a factor of 206.5/220 = 0.94. figure 9 shows that a 0.94 reduction will occur at an ambient temperature of -32 c. in this example, the tisp3290h3 will allow normal equipment operation, even on an open-circuit line, provided that the minimum expected ambient temperature does not fall below -32 c. jesd51 thermal measurement method to standardize thermal measurements, the eia (electronic industries alliance) has created the jesd51 standard. part 2 of the st andard (jesd51-2, 1995) describes the test environment. this is a 0.0283 m 3 (1 ft 3 ) cube which contains the test pcb (printed circuit board) horizontally mounted at the center. part 3 of the standard (jesd51-3, 1996) defines two test pcbs for surface mount components; one for packages smaller than 27 mm (1.06 ? on a side and the other for packages up to 48 mm (1.89 ?. the thermal measurements used t he smaller 76.2 mm x 114.3 mm (3.0 ?x 4.5 ? pcb. the jesd51-3 pcbs are designed to have low effective thermal conductivity (high thermal resistance) and represent a worse case condition. the pcbs used in the majority of applications will achieve lower values of thermal resist ance and so can dissipate higher power levels than indicated by the jesd51 values.
january 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp3xxxh3sl overvoltage protector series sl003 3-pin plastic single-in-line package this single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compo und will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated i n high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. sl003 2 1 3 notes: a. each pin centerline is located within 0.25 (0.010) of its true longitudinal position. b. body molding flas h of up to 0.15 (0.006) may occur in the package lead plane. mdxxce index notch 9.25 - 9.75 (0.364 - 0.384) 3.20 - 3.40 (0.126 - 0.134) 6.10 - 6.60 (0.240- 0.260) 0.203 - 0.356 (0.008- 0.014) 0.559 - 0.711 (0.022 - 0.028) 3 places 12.9 (0.492) dimensions are: metric (inches) 4.267 (0.168) min. max. 1.854 (0.073) max. 8.31 (0.327) max. 2.54 (0.100) typical (see note a) 2 places ?isp?is a trademark of bourns, ltd., a bourns company, and is registered in u.s. patent and trademark office. ?ourns?is a registered trademark of bourns, inc. in the u.s. and other countries.

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